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W**D
Outstanding resource
I've taught both software and logic design courses. In the software world, coding style is a central part of the curriculum and grading policy - more than getting the answer right, it's about getting the answer well. I see that far less in the VHDL/Verilog world, at least in academia. That leaves students poorly prepared for industrial logic design practice and for design efforts much larger than a homework assignment. This book fills a sorely felt need.I recommend this to two audiences. Many of the concepts and practices in this book lie beyond what a beginning student could grasp; it's not for someone struggling with notions of clocked logic and state machines. I do recommend it, however, to advanced students and to industrial logic designers struggling with multi-person projects, re-usability, engineers fresh out of school, and other issues of scale. Although individual design elements might be (and often should be) small, problematic practices at the lower levels propagate and interact as components are assembled into larger structures. The best time to weed them out is the earliest time. Second, I recommend this to anyone teaching introductory courses. They're positioned to introduce good style, legibility, and safe design practices from the first assignments on, just as in the software world. Even if many of the practices recommended here will be familiar - and they will to anyone who's seen similar guides for software design - seeing them gathered and organized into a coherent body of practice can be very helpful. Some practices will seem excessive for small projects, and instructors will choose what matters at each level. Still, it will be helpful to give students, especially in the higher levels, some idea of what they'll be expected to know once they leave school.It's hard to find fault with these recommendations. I did find a few points of emphasis where opinions might differ, however. Real-world logic design commonly uses component libraries, including things like RAMs, FIFOs, arithmetic elements, transceivers, PLLs, and lots of other elements hardened into FPGA fabric or ASIC design flows. Also, tools for specific logic fabrics generally include idiosyncratic (and non-portable) pragmas for guiding synthesis. Wherever possible, designers should draw on such technology-specific utilities instead of rolling their own. If portability across technologies or tool flows becomes an issue, good modular design can help isolate such technology specifics and make them easy to swap out. Jasinski also discusses synthesizable vs non-synthesizable constructs, a concept I find very important. My own preference, in the interest of clarity, is to emphasize the distinction early on, and to keep non-synthesizable constructs out of 'payload' logic entirely. Of course, this brings up the gray area of compile-time constant expressions. This text mentions them briefly, though not by that name, but I feel that they deserve a longer, more rigorous discussion that demonstrates creative ways they can be used. Perhaps integer division or a floating-point sine function can not be synthesized directly. Still, designers can safely use such functions to generate fixed-point constants that can be synthesized.This could pair well with its kin from the software world. Although they'd overlap in many areas, software design guides offer suggestions not mentioned here. For example, this book points out that VHDL supports operator and function overloading. I did not see mentions of the hazards of overloading, however. A two-parameter function can do whatever your imagination can dream up. But, if you overload the binary '+' operator with any function other than addition of some kind, or if you endow it with wild side effects, you're well on your way to unmaintainable and unusable code, no matter what language it's in. Minor points aside, I recommend this highly to architects developing style guides and to educators (including self-educators) at every level.-- wiredweird
M**P
Excellent resource for coding
This is absolutely the best VHDL book that I have ever encountered.It not only covers the details of VHDL, but the chapters on Design and Architecture, Design Challenges, and Design Principles discuss concepts geared more towards a software viewpoint. Being more familiar with hardware, the concepts presented in the above chapters were eye opening and fascinating to me.I also found the section on Practical Coding Recommendations eye openers. I will certainly incorporate the ideas presented in the book in all of my future work with VHLD.If you are a beginner with VHLD, I would recommend focusing on parts II through IV, which talk more about the details of the language of VHDL. Once you have a good feel for the VHDL language and have worked on a few projects, the other sections will be easier to digest.I highly recommend this book! I'd give it 10 stars if I could!
C**E
Too over the top
Too over the top
K**N
Excellent!
This is a very well written book. Half of it is about VHDL, and the other half is about how to write great code using concepts and guidelines that apply to any language.
B**N
Great system design advice beyond just VHDL
A great book not just for VHDL but for system design overall.
C**J
No question, it is a must have.
This is my first review but this book really deserves more credit.It is a modern book for VHDL and HDL development integrated with new knowledge from the software development front. I believe this book will spark a new wave of ideas for years to come and deliver to the HDL front what software went through.This book is equally important and as good as a Doulos Golden Reference.
E**N
Excellent Book!
Excellent book! Already recommended it to many friends. This book is more than just VHDL. It teaches you how to think before writing any code.
N**I
YOU WONT LEARN A SINGLE THING!
Terrible book all fluff and no substance. You really will not learn a single thing when 99% of the book is just theory and no real concrete examples. The VHDL code you do see, albeit very little, is hardly explained.
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